The first non-monolithic Core processor, the first use of Intel Node 4, the first integrated AI coprocessor, the first burst of multimedia capabilities, the first introduction of Wi-Fi 7, and so on. To say that the new ‘ Meteor Lake ‘ processor architecture is a milestone in the history of the Intel giant would be an understatement. Here we take a look at the processor that will (perhaps?) put the chip giant back on track.
” This is our biggest architecture evolution in 40 years “: Intel’s executives were not sparing in their praise for the new “Meteor Lake” processor architecture unveiled at Innovation, Intel’s annual mega-show, which opens today in San José, California.
For more than a year now, a myriad of articles have been gradually unravelling the ‘secrets’ of Meteor Lake. But while until now we only knew the fundamental concept of the chip – Intel’s first chiplet-based processor – as well as the outlines of certain building blocks (new GPU, first NPU), the company that was once number 1 in semiconductors is finally opening the information valve. After sharing the embargoed information with us at a press event in Malaysia last month, we can now share with you all the details (and promises) of this ‘miracle’ chip.
We’ll see if the technical (and commercial) miracle happens, but it’s already no exaggeration to say that this new chip architecture is eagerly awaited, both internally at Intel and in the PC world in general. Highly “scalable”, Intel promises us, Meteor Lake is, according to the diagrams and explanations shared by Intel with the press, a revolution in the very way the American company has been designing chips until now (1).
Here again, the word ‘revolution’ is not a superlative used gratuitously: even if Intel’s chips don’t manage to convince in terms of performance (and above all energy consumption, the major project of this generation), the list of innovations, novelties (for Intel or for the industry) and other ‘firsts’ that are part of this new generation of Core processors is, in fact, the largest ever seen from ‘the Blues’.
Foveros or ‘disagregated’: Intel converts to the brick game
The chip references to be announced under the ‘Meteor Lake’ banner will be the first to use a so-called ‘disaggregated ‘ design. To understand the term, we need to remember how Intel used to design its chips: from a single block. This so-called monolithic approach consists of producing complete chips on silicon wafers. Once cut out, these pieces of electronics only need to be tested, validated and integrated on a support before being placed on motherboards and marketed.
This approach has its advantages, particularly in terms of pure performance, but it also has its limitations. The most important of these is price. While printed circuit etching techniques continue to chase nanometres, this is being done at an explosive cost. TSMC’s 3nm wafers are said to cost up to $30,000 each. However, the larger the surface area of a chip, the lower the mechanical yields, as we will see in a forthcoming article. As a good challenger in the hunt for costs and optimisations, AMD has had to embrace this situation more quickly than Intel, and for several years now has been producing its Zen chips by adding chiplets, thanks to its own technologies. But also, and above all, thanks to the know-how of its foundry partner, Taiwanese company TSMC.
Even though TSMC produces parts of the Meteor Lake chip for Intel, it is the latter that, unlike AMD or Apple (with its ‘Ultra’ chips), assembles the final chips, using its in-house technologies such as Foveros. Tried and tested on a chip with conventional sales, Foveros is at the heart of Meteor Lake’s potential commercial success. Whereas it takes large, expensive dies (i.e. chunks of silicon) complete to make a 12ᵉ generation Core, Meteor Lake chips are compositions of tiny pieces of silicon. And when it comes to semiconductors, ‘small’ rhymes with better yields and therefore (much) lower costs. What’s more, the engraving finesse of these bricks depends on requirements: very thin and more expensive for the CPU and GPU (Intel 4 and TSMC N5), slightly thinner and much cheaper for I/O and the socket (TSMC N6). While packaging costs money, the cost of engraving points has soared that Intel didn’t need to bring out the calculator for very long.
Apart from the financial gain in terms of yields – which theoretically comes at the price of some loss of pure performance, notably because of the latency in passing information from one block to another – this ‘disaggregated’ design method also makes it easier to configure different references. And to increase power by adding chunks with more or less computing units. But to achieve this, you need to completely rethink the way in which the logical elements of the SoC (system on a chip, the technical name for the all-purpose chips at the heart of our PCs, smartphones and other tablets) are designed and interfaced.
Slice and dice for better management… and lower power consumption
Meteor Lake is a chip built from “tiles”. These specialised pieces of silicon are linked together thanks to Intel’s expertise in what is known as packaging – which in this case has nothing to do with the design of your breakfast cereal boxes! Far from being a trivial task, the logical ‘cutting’ of the chip’s various components is the fruit of a great deal of hard work. The engineers had to fulfil three missions: to limit the impact of this disaggregation on performance, to enable the scalability of different chip references and to do everything possible to limit energy consumption.
As far as the last point is concerned, Intel’s speech was a clear reminder of the technological order represented by Apple’s M1 and M2 chips. These are chips whose superiority lies less in pure performance – a Core i9 outperforms them most of the time – than in energy efficiency. The ARM cores, the (at the time) unique 5nm etching and Apple’s control over the OS and drivers gave Intel and AMD a major slap in the face when it came to performance/watt ratio. Which, gamer PCs and other mobile workstations aside, is one of the most important technological factors in laptop purchasing decisions.
The engineers have therefore completely redesigned the chip. And when we say “completely”, we’re putting it mildly: not only have the memory exchanges been reviewed, but they’ve also split up certain calculation units (GPU and multimedia engine), created new units (input/output, NPU) and integrated CPU cores in unusual places. And as you will see, the design of the major blocks – the CPU, the GPU, but also the SoC block and the multimedia engine – have been designed – both internally and organisationally – to limit energy consumption.
Meteor Lake processor: new beating cores
Inspired by the 12ᵉ (Alder Lake) and 13ᵉ (Raptor Lake) generations of Core processors, Meteor Lake endorses the big.LITTLE CPU organisation. Inherited from the ARM world, this design is based on two types of cores: high power (the P-Core, where P stands for Performance) and low power (E-Core, where E stands for Efficiency). To decide who does what, the Thread Director is still involved. This new batch of processors brings with it two new core types: Redwood Cove (P) replaces Raptor Cove, and Crestmont replaces Gracemont.
As the two slides above show, Intel’s CPU engineers have obviously improved each core type. As well as their behaviour: in the past, the Thead Director always started by addressing the P-Cores for architectural reasons. Now it can immediately choose which type of core to activate – again, an energy-saving measure. While there have been some optimisations here and there – better detection of single-core performance peaks (P-Cores) and a significant improvement in multitasking (which was given priority to E-Cores) – the designers have limited the race for raw power. While pure performance gains (which are much harder to achieve in the CPU domain because the architectures have been so finely tuned) should be part of the equation, this is not the main focus of Meteor Lake.
It’s something that really shone through in the various press presentations. While the GPU, NPU, Intel 4 etching and other technologies were explained at length in PDFs running to dozens of pages, Intel decided to summarise the improvements to each core type in a single slide… Or almost.
Because a new type of CPU core is appearing in the SoC: an extremely low-power core. It is new, but more in terms of its location on the chip than its design or architecture. What’s most surprising is to see this CPU core not in the “Compute Tile” or CPU, but inside a new piece of chip: the “SoC Tile”.
Meteor Lake processor: SoC, I/O and NPU
One of the challenges of designing a chip based on independent “blocks” is the circulation of information within the chip. This also involved identifying bottlenecks – the ring fabric of previous generations was shared and could therefore quickly become saturated – and implementing optimised circulation schemes. At the same time, Intel engineers had to fulfil one of their missions, which was to hunt down energy consumption.
The idea was therefore to create a new tile, incorporating support for protocols such as SATA, PCIExpress, USB and networks (Ethernet, Wi-Fi), as well as elements removed from other tiles, notably display management and the multimedia decoder (see below “GPU: more specialised and (up to) twice as powerful”). A whole host of functions that need to be controlled. And to avoid waking up the powerful E-Cores and P-Cores, Intel has simply integrated two CPU cores into its tile. Two Cresmont E-Cores, like those in the compute tile, but clocked much more slowly to become E-LP (E-Core Low Power) cores. These are very energy-efficient chips, capable and modern enough to handle background tasks.
Here, as with its ‘big.LITTLE’ switchover, Intel is taking its inspiration from the world of ARM SoCs such as Snapdragon chips, which have already been incorporating highly energy-efficient mini CPU cores for several years. Incidentally, note that the two E-LP CPU cores will appear as fully-fledged cores in Windows. But it is the operating system and the Thread Director that will decide, at any given moment, which task goes on which core.
Within the SoC part, a sub-unit has appeared with Meteor Lake: the first AI accelerator in the history of Intel Core processors, a real NPU like in smartphone processors. An AI chip that doesn’t come out of nowhere, but is in fact based on the Myriad chips that Intel picked up when it bought Movidius in 2018.
While this is indeed the first AI chip in the Core range, it is in fact Intel’s third generation of NPUs after Myriad X and Keem Bay. Intel already offers all the software tools to address, depending on the situation, AI tasks on the GPU (intense calculations), the CPU (complex calculations) or the NPU (AI tasks maintained over time). In other words, from a software point of view, Intel is already ready and waiting for Windows 12.
And as with recent AMD chips, Intel has created a second tile to manage input and output. Logically called the ‘IO Tile’ (I/O stands for In and Out), this tile marks yet another major development for Intel. Whereas in the past all the contours of the monolithic chip could be used for interconnection, the disaggregated design has led Intel to design this dedicated piece of chip which works in concert with the SoC part.
GPU: more specialised and (up to) twice as powerful
Before talking about performance promises, let’s stay on the subject of energy conservation. While the Xe LPG graphics architecture succeeding the Xe LP in the 11ᵉ and 12ᵉ generation Core is certainly more efficient intrinsically – and without even mentioning the XeSS – one major element should enable the graphics chip (GPU) to consume less energy: its split with the multimedia engine. Whereas the ASIC (pre-programmed chip) that compresses and decompresses video and audio streams used to be integrated into the GPU, Intel’s graphics engineers have exfiltrated this part of the GPU for this new generation of chips.
This is because its integration into previous Intel GPUs had an energy cost: for each video operation, the GPU had to be ‘woken up’. But the component that consumes the least power is the one you don’t use. And compared to an ultra-specialised video chip, a GPU naturally consumes more energy, even if it simply acts as a pass-through to the multimedia engine. Another element that Intel has removed from the GPU is display management, which ends up in the aforementioned Tile SoC.
So what does this GPU have left? Graphics processing cores. And these cores are now more powerful, faster (higher frequencies) and (potentially) more numerous. This major clean-up, the optimisation of its render slides, the software optimisation work of the previous generation (drivers) and the addition of hardware computing units (ray-tracing) mean that the Xe LPG GPU can offer the same doubling in performance as the two previous generations of Iris Plus and Xe graphics: a handsome x2.
This is obviously a maximum doubling in performance (depending on the GPU configuration), which is quite logical considering that Intel is starting from a very low base (remember the UHD circuits!), but it’s still something to celebrate, given that the first Xe showed a sufficiently high level of quality in ultraportables. A tenfold increase in the performance of its on-board GPU offering in just four years is still an excellent piece of work. As for this GPU’s performance, it won’t just be used for Cyberpunk 2077 or Paint 3D effects. It will become a pillar of AI calculations. And, for the first time at Intel, these will be supported by a dedicated chip.
What remains to be discovered about the chip? Its physical embodiment in real processor references. The result of work by all the Intel groups – design distributed between the USA and Israel, manufacturing between Intel’s plants in Ireland and TSMC’s forges in Taiwan, with assembly in Malaysia – Meteor Lake is a jewel of complexity that will soon be taking shape in machines. And the first benchmarks will reveal whether or not this new architecture is indeed the revolution that Intel so desperately needs.
(1): Intel has already produced chips by stacking or gluing together heterogeneous “bits” of silicon, but until now these have been attempts (Lakefield, 2020) or professional products in the process of maturing (Ponte Vecchio, Xeon Sapphire Rapids, 2023 for both). Meteor Lake is therefore Intel’s first ‘real’ mass-market product, representing the technological pivot of this design based on assembling pieces of chips.
