Intel has just given some insights into its plans for its upcoming Meteor Lake, Arrow Lake and Lunar Lake architectures. These 3 generations will take advantage of the 3D packaging technology “Foveros”. Meteor Lake will be the result of an assembly of several chips from different technologies. The base or interposer chip will be manufactured on the 22FFL (or Intel 16) node, the processor compute tile will take advantage of the Intel 4 (formerly 7 nm) node. The GPU tile is expected to come from TSMC’s 5nm (N5) process, while the SoC and I/O array will be based on the Taiwanese’s 6nm (N6) node. Some time ago, the use of 3nm had been mentioned at TSMC but it seems that this process will be used on the next generation, Arrow Lake.
Meteor Lake: 5 and 6nm from TSMC used massively
Taking the idea of a technology that we know well at AMD (the Infinity Fabric interconnection), Intel proposes an “ecosystem of open chips” via the Universal Chiplet Interconnect Express (UCIe). As we mentioned earlier, the iGPU of Meteor Lake will benefit from a modified implementation of Xe-HPG. The latter is the one that powers the 1st generation Arc Alchemist GPU family. It is possible that Intel had to change its plans on this part in order to adapt to the availability constraints of its partners in particular. 
