While no release date has been announced by Intel, first tests under different benchmarks of Sapphire Rapids processors appear on the Internet.
96-core Sapphire Rapids dual socket tested
Originally scheduled for 2021, the next-generation Xeon processors named Sapphire Rapids have since been postponed several times. The cause: problems mainly targeting the Eagle Stream platform. They are now aiming for a release in the third or fourth quarter of 2022.
Despite the appearance of sample for several months, we had no real test of the processors until today. Indeed the Chinese leaker Yuuki_AnS published on twitter, the results of a dual socket Sapphire Rapids with 96 cores under several benchmarks, such as Cinebench or AIDA64, giving us a first glimpse of performance.
We have a dual socket with 96 cores (48 cores per CPU) and 192 threads, with a base frequency of 2.3 GHz and a boost to 3.3 GHz but also a TDP of 270W per CPU. Moreover, we are on an ES2 version. All this is accompanied by a 90 MB L3 cache and DDR5 memory.
This configuration has been tested on several benchmarks against an Intel Xeon Platinum 8380 (Ice Lake-SP) and an AMD Epyc 7773X (Milan X), both in dual socket too, with respectively 80 and 128 cores.
Let’s start with Cinebench R20, the SPR configuration arrives at the level of the system using the two Ice Lake processors with about 25000 points for both. It is surpassed by the AMD with 30338 points thanks to its higher number of cores.
It should be noted, of course, that the low performance despite the higher number of cores is due to very low frequencies and the bugs that may remain in the ES2 version.
For the AIDA64, no surprise on the memory and cache side, thanks to a higher amount and DDR5, the SPR configuration shows solid performance against its ICL-SP predecessor. However, it should be noted that the Milan X configuration also achieves very good performance on the cache level and especially in L3, with throughputs 3 times higher thanks to the 3D V-cache.
To see other results, we invite you to follow the source.
