Over at AMD, things are moving forward as the company unveils an Epyc Venice processor equipped with 256 cores. As seen in the photos, this processor uses a chiplet design with dies containing the cores and a large central I/O die that manages all the system’s interfaces. This generation brings exciting features such as PCIe 6.0, for example.
Epyc Venice: A Zen 6 Processor Unveiled by AMD!Â
A 256-core beast!
Behind these ultra-HD 4K images (just kidding), AMD is unveiling a next-generation server processor. We’re not talking about Ryzen CPUs aimed at the consumer market and designed to run video games—no, these are processors built for server operations, scientific computing, and AI.
That’s why we’re seeing a particularly powerful configuration inside. In fact, AMD’s new Zen 6 architecture allows for up to 256 cores and 512 threads (compared to the current 192c/384t) thanks to a new CCD layout. In this specific case, there are eight chiplets, each with 32 cores divided into two complexes of 16 cores.
At the center is a massive I/O die, which is responsible for interconnecting the chiplets as well as managing the system’s various interfaces. In particular, it integrates the new PCIe 6.0 controllers as well as theDDR5 memory controllers. Zen 6 will introduce support for PCIe 6.0, which promises double the bandwidth compared to the current PCIe 5.0.
For now, we don’t yet know the clock speeds for this model; they will be revealed during the CPU launch… or sooner if there’s a leak.
Still using a chiplet architecture = greater modularity:
Of course, we shouldn’t have expected AMD to change its CPU design habits. It’s worth noting that this chiplet design offers many advantages, such as cost control. It’s simpler and less expensive to produce several small chips than to produce a single large one. Furthermore, by removing dies containing cores, AMD can easily adjust its CPU configurations to tailor its processors to different use cases or price points.