According to a leak shared on the Internet, Intel is planning to return to a unified core design, abandoning the hybrid architecture after seven years of existence. The Razor Lake generation, scheduled to arrive in 2027, would be the last hybrid combination to use Griffin Cove P and Golden Eagle E cores. At this point, we’re still working on rumours. However, this hypothesis has already been circulating for some time at Intel. Nevertheless, it would be too simple to assume that this is a U-turn. In fact, this “comeback” isn’t really a comeback at all. After all, not all future cores will be identical. Intel is said to be moving closer to AMD’s philosophy on the subject, offering classic, compact variants, similar to the Zen 5 and Zen 5c. This could mean denser versions, grouped in clusters of four cores with a shared L2 cache, while others could reach higher frequencies with shared or dedicated L2/L3 caches.
The end of hybrid processors at Intel: the choice of reason and efficiency
The main aim of these unified cores would be to combine the two worlds. First of all, they would be more energy-efficient than P cores, thanks in part to improved manufacturing processes. According to the leak, PPA (Power, Performance, Area) gains should compensate for higher power consumption and increased chip size. It is Intel’s objective to concentrate numerous cores in a reduced space without compromising efficiency, and this strategy would be the culmination. So, again according to the leaker , if Intel uses a state-of-the-art etching process for Titan Lake in addition to the compact variant mentioned above, the Blues could offer up to 100 cores per processor, divided into 48 + 48 + 4 LP E cores.
Finally, this switchover would also enable Intel to continue its logic of optimizing operating costs. The end of hybrid design should enable Intel to reduce the complexity of its organization. Currently, two teams are working simultaneously on two different designs (the center in Israel and the one in the USA). The plan is to design 100% of the chips in the USA (at the Austin center), which would simplify organization and eliminate duplication of engineering effort.
